Testing, verification, and quality assurance in the life cycle of semiconductor product development

Microelectronics is one of the very high-tech industrial sectors, and its continuous growth and its influence on the evolution and development of digital life can be taken as evidence that such a statement is true. In fact, in today’s world, ICs are found everywhere, ranging from cheap everyday consumer products to sophisticated, expensive, and complex military or aircraft devices. Nevertheless, all these products are required to be within an appropriate quality range. Most of them have several quality requirements, and quality cannot be verified without tests. ICs, chips, and semiconductor products in general must execute some tests before entering the packaging or post-packaging stage. Furthermore, testing failures cannot be handled unless somehow traced back to its cause. In order to improve the test capability, failures must be recorded and their diagnosis performed by appropriate means (Cabanes et al., 2021; Sundaram & Zeid, 2023; Hii et al., 2024).

When considering the life cycle of a semiconductor product, from its conception to the test along time to the disposal, most key and critical steps are performed in silicon; the most relevant design and characterization tools are implemented on the same platform. In the first place, design tools generate the necessary information to fabricate the product. Near-fabrication tools are better suited to enhance yield and controllability of the steps. In-process and post-fabrication test and quality verification tools are similarly implemented on silicon and do not need any additional hardware. The implementation of tape-out test and product-level diagnosis on silicon is not yet possible, though, and needle test hardware must be used. Good solutions from all these industrial domains involve large investments, and this is the reason why there are mismatches among tools from different domains. Thus, tools should detect as many defects as possible and reveal candidate types of defects to limit the necessary test enhancement efforts.

Testing and Verification methodologies undergo fundamental changes with the integrated circuit becoming System on a Chip. System testing involves functional and structural testing of the IC, special attention shall be paid for fault detection and localization ability of the devised tests. A rapid test development methodology scaling down to higher performance digital mixed signal very large scale integrated device input-output macro models verification with analog delay modeling is in practice using numerous ICs and their parameters from design environments. Testability and fault management aspects of the design shall be looked into by identifying the need for the development of larger heterogeneous memory testing at system speed (True et al., 2021; Zheng et al., 2021; Zhou et al., 2022).